Teaching Experience

Spintronics (EE237):

This is a new 4 credit graduate level course initiated by me after I joined the ShanghaiTech University. I designed this course to prepare students for the "More than Moore" era, where the charge-based paradigm of CMOS is supplemented or replaced by spin-based logic and memory.

I recognized that students in the Engineering department might struggle to see the connection between abstract quantum mechanics and physical devices. Therefore, I designed the learning progression to be highly sequential. The course begins with foundational physics, revisiting quantum mechanics, angular momentum operators, and the Larmor precession (Weeks 1-3). From there, I deliberately transition the curriculum into macroscopic magnetic behaviors, such as exchange interactions and magnetic anisotropy (Weeks 4-5). We then transition to the modeling - introducing the Stoner-Wohlfarth model and macrospin dynamics (Week 6). By mid-semester, we move into building blocks of spintronics like magnetic tunnel junctions (MTJ), spin-transfer torque (STT), spin-orbit torque (SOT), domain wall, and antiferromagnets (AFM) (Weeks 8-12). The final part of the course is dedicated to system-level innovation, covering unconventional computing architectures like neuromorphic computing and computing-in-memory (CiM) (Weeks 13-15).

Besides, recognizing that modern spintronics research is heavily reliant on modeling, I integrated two course projects into the curriculum. In project I, students learn to use MATLAB to simulate macrospin dynamics via the Runge-Kutta (RK4) integration of the Landau-Lifshitz-Gilbert (LLG) equation. In Project II, they transition to micromagnetic simulation using standard tools like Mumax3 or OOMMF. This hands-on experience demystifies the physics. When a student sees the magnetization spiral towards m_z = -1 in their own simulation, the theory becomes tangible.

Designing and delivering EE213 has been a defining milestone in my development as an educator, reflecting my broader mission to integrate research-led teaching into the core engineering curriculum. By exposing students to the physical limits of current technology and equipping them with the theoretical and computational tools to explore new frontiers, I am preparing them to be leaders in the next generation of hardware innovation. Moving forward, I plan to continue refining this course by integrating emerging topics, such as altermagnetism, 2D magnetic materials, and novel quantum materials, and by further expanding the computational lab modules. Ultimately, my goal is to cultivate an educational environment where rigor, discovery, and practical engineering converge, ensuring our graduates are not just ready for the future, but are the ones who will build it.

Circuit related courses: Digital Circuits (EE115B), Digital Integrated Circuit I (EE113), Digital Integrated Circuits II (EE213):

In these courses, I guide students through the complete hierarchy of circuit design: from the physical physics of a semiconductor device up to a complete integrated circuit system. To realize this, I have personally designed and refined a three-course sequence over these years. In EE115B (Digital Circuits), students build a foundational understanding of boolean algebra, combinational and sequential logic. I also introduced Verilog hardware description language at this introductory stage to prepare them for modern digital design flows. In EE113 (Digital Integrated Circuits I), we transition to the transistor level, exploring CMOS logic, gate sizing, propagation delay, and power consumption. We transition from ideal gates to real-world CMOS inverters, analyzing propagation delay, noise margins, and logical effort. Finally, EE213 (Digital Integrated Circuits II) provides rigorous, graduate-level training in advanced datapath integration, memory arrays. Students are exposed to sub-100nm predictive models and the full physical design backend, including parasitics extraction and post-layout simulation.

A distinctive feature of my courses is the integration of cutting-edge research and emerging technologies into the curriculum. This is most evident in two innovative project designs I developed: For the EE213 final project, I challenged students to design a neural network accelerator including 192-bit SRAM, a Multiply & Accumulate (MAC) module, a quantization module, a ReLU module, and a control Unit. This project was simplified from a 2022 ISSCC paper, allowing students to engage with state-of-the-art circuit architecture. In EE115B, I introduced a forward-looking bonus assignment: Embrace LLM for digital circuit design, where students evaluate the effectiveness of tools like ChatGPT in writing Verilog, compare different LLMs for circuit design, and present their findings to the class for peer voting.

To support skill-building, I designed intensive, hands-on lab assignments that require students to use industry-standard Electronic Design Automation (EDA) tools like Cadence Virtuoso and HSPICE. Rather than stopping at schematics simulation, the students need to draw custom layouts, run Design Rule Checks (DRC) and Layout Versus Schematic (LVS) verifications, and extract parasitic parameters for post-layout simulations.

Moving forward, I intend to continue evolving these courses to incorporate the latest developments in low-power design and advanced manufacturing technologies.